Könyv Power-Constrained Testing of VLSI Circuits Nicola Nicolici

Power-Constrained Testing of VLSI Circuits

Nyelv: Angol
Kötés: Kemény kötésű
Elérhetőség: Beszállítói készleten alacsony példányszámban
Küldés 13-18 napon belül
41 425 Ft
Minimization of power dissipation in very large scale integrated (VLSI) circuits is important to imp...

Információk a könyvről

Nyelv
Angol
Kötés
Könyv - Kemény kötésű
Kiadva
2003
oldal
178
EAN
9781402072352
ISBN
140207235X
Enbook ID
01417851
Súly
990
Méretek
210 x 297 x 15

Teljes leírás

Minimization of power dissipation in very large scale integrated (VLSI) circuits is important to improve reliability and reduce packaging costs. While many techniques have investigated power minimization during the functional (normal) mode of operation, it is important to examine the power dissipation during the test circuit activity is substantially higher during test than during functional operation. For example, during the execution of built-in self-test (BIST) in-field sessions, excessive power dissipation can decrease the reliability of the circuit under test due to higher temperature and current density.§Power-Constrained Testing of VLSI Circuits focuses on techniques for minimizing power dissipation during test application at logic and register-transfer levels of abstraction of the VLSI design flow. The first part of this book surveys the existing techniques for power constrained testing of VLSI circuits. In the second part, several test automation techniques for reducing power in scan-based sequential circuits and BIST data paths are presented.

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