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Könyv SystemVerilog for Hardware Description Vaibbhav Taraate

SystemVerilog for Hardware Description

Szerző: Vaibbhav Taraate
Nyelv: Angol
Kötés: Puha kötésű
Kiadó: Springer Verlag, Singapore
Elérhetőség: Beszállítói készleten alacsony példányszámban
Küldés 13-18 napon belül
33 131 Ft
This book introduces the reader to FPGA based design for RTL synthesis. It describes simple to compl...

Információk a könyvről

Szerző
Vaibbhav Taraate
Nyelv
Angol
Kötés
Könyv - Puha kötésű
Kiadva
2021
oldal
252
EAN
9789811544071
ISBN
9811544077
Enbook ID
36509601
Kiadó
Springer Verlag, Singapore
Súly
454
Méretek
155 x 235 x 16

Teljes leírás

This book introduces the reader to FPGA based design for RTL synthesis. It describes simple to complex RTL design scenarios using SystemVerilog. The book builds the story from basic fundamentals of FPGA based designs to advance RTL design and verification concepts using SystemVerilog. It provides practical information on the issues in the RTL design and verification and how to overcome these. It focuses on writing efficient RTL codes using SystemVerilog, covers design for the Xilinx FPGAs and also includes implementable code examples. The contents of this book cover improvement of design performance, assertion based verification, verification planning, and architecture and system testing using FPGAs. The book can be used for classroom teaching or as a supplement in lab work for undergraduate and graduate coursework as well as for professional development and training programs. It will also be of interest to researchers and professionals interested in the RTL design for FPGA and ASIC.

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